Freelancer@JJSchmid.de
- ASIC/FPGA/VHDL
(Radiation/TID, Aging/ROSC, DelayLines/LiDAR, Sensorics, etc.)
- jjschmid & Publications
- jjschmid & Patent_applications
- jjschmid & History
- jjschmid @ iSyst (RedunsSys, SEU-TID-IP, VHDL_AMS&Faultinsertion, Robustes ASIC&FPGA Design)
- iSyst @ RADSAGA/Cern
- jjschmid @ Conti_Temic
- jjschmid @ XING
- jjschmid @ LinkedIn
- jjschmid @ IEEE.org (dormant)
- jjschmid @ IEEE.Computer.org
- jjschmid @ RS.IEEE.org (Reliability Society)
- jjschmid @ EMBS.org (IEEE Eng. in Medicine & Biology)
- jjschmid @ NPSS.org (IEEE Nuclear & Plasma Sciences Society)
- R2E @ Cern (Radiation to Electronics)
- TU/SSE Chemnitz
- Fraunhofer IIS/EAS (VHDL-AMS/FAT-AK30)
- COSEDA-Technologies (SystemC-AMS/Coside)
- Synopsys / Saber
- Actel / Microsemi (FPGA, Libero, MSC/GE, Avnet-Memec-Silica, ARROW)
- Mentor / ModelSim
- SynTest / RobustScan / BIST
- Integrierte Schaltungen (ICs)
- FPGA, ASIC & ASSP
- Design for Test (DFT, Scan, Jtag, BIST)
- FPGA-Kongress
- LIDAR(Ibeo/MicroVison)
- Recent Activities (2023+)
- B-HORIZON Microelectronics
- B/S/H Hausgeräte (Zaragossa/ES)
- Chipspirit Technologies (Bangalore/IN)
- Renesas Electronics (Düsseldorf, Tokyo/JP)
- B-Neo Sensor Technology by B-Horizon
- B-Guardian Smart Healthcare by B-Horizon
- Altium Designer (Schematics&PCB)
- Embedded Engineering (HW/SW)
- Forschungsprojekt DI-OWAS: Open-Source-Designwerkzeuge für flexible Chipsysteme in KI und Kryptografie (Uni Heidelberg et al.)
- DC Vision Systems GmbH
- Fraunhofer/IMS
- Forschungsprojekt "ParaObsol" (Obsoleszenz Management)
- www.elektrotechnik.vogel.de: „Heilmittel“ für Lösungen bei abgekündigten elektronischen Bauteilen
- TuZ 2011: A new IP-Core integration concept for signal manipulation and timing adjustment using a configurable I/O architecture
- Forschungsprojekt "RedunSys" (Redundante Systeme)
- BICCnet 2011: Echtzeit-Diagnose von redundanten Systemen und Alterungseffekten im medizinischen Strahlenumfeld
- elektrotechnik.vogel.de: RedunSys-Projektabschluss: Design und Test von redundanter Elektronik für strahlungsbelastete Einsatzgebiete
- Ionisierende Strahlung & Alterung von ICs
- Transistor-Aging (TID)
- Softerrors (SET, SEU, TMR)
- Ein wiederverwendbarer VHDL / IP-Core zur Überwachung der Alterung von sensitiven mikroelektronischen Schaltungen (Paper / Slides @ TuZ-2013)
- RADHARD-2016 @ Seibersdorf Laboratories
- RADECS (RADiation Effects on Components and Systems)
- RADSAGA @ Cern
- FPGA-based Modelling of Aging Effects and Implementation of IP-Cores for Wear-Out-Detection (Paper / Slides @ EWC-2020)
- HW/SW Co-Design
- VHDL & VHDL-AMS (analog mixed signal)
- VHDL-RNM (Real Number Modeling)
- C++ & SystemC / AMS
- Functional Safety, ISO 26262 & Fault Insertion
- On/Offline Fault Insertion & Analysis in a Virtual ASIC System Simulation Environment (TuZ-2014)
- Hardware/Software Co-Simulation of SPI Enabled ASICs and Software Drivers for Fault Injection and Regression Tests (Paper / Poster @ DVCON-Europe-2014)
- Automation & Tools